ch32v003f4p6通过软件IIC点亮oled灯

marxingZIP软件IIC_OLED.zip  401.7KB

资源文件列表:

ZIP 软件IIC_OLED.zip 大约有86个文件
  1. 软件IIC_OLED/
  2. 软件IIC_OLED/.cproject 25.38KB
  3. 软件IIC_OLED/.project 1.75KB
  4. 软件IIC_OLED/.settings/
  5. 软件IIC_OLED/.settings/language.settings.xml 1.13KB
  6. 软件IIC_OLED/.settings/org.eclipse.core.resources.prefs 128B
  7. 软件IIC_OLED/.template 711B
  8. 软件IIC_OLED/GPIO_Toggle.wvproj 202B
  9. 软件IIC_OLED/obj/
  10. 软件IIC_OLED/obj/Core/
  11. 软件IIC_OLED/obj/Core/core_riscv.d 94B
  12. 软件IIC_OLED/obj/Core/core_riscv.o 14.89KB
  13. 软件IIC_OLED/obj/Core/subdir.mk 1.14KB
  14. 软件IIC_OLED/obj/Debug/
  15. 软件IIC_OLED/obj/Debug/debug.d 4.26KB
  16. 软件IIC_OLED/obj/Debug/debug.o 31.18KB
  17. 软件IIC_OLED/obj/Debug/subdir.mk 1.12KB
  18. 软件IIC_OLED/obj/GPIO_Toggle.elf 106.2KB
  19. 软件IIC_OLED/obj/GPIO_Toggle.hex 17.36KB
  20. 软件IIC_OLED/obj/GPIO_Toggle.lst 92.42KB
  21. 软件IIC_OLED/obj/GPIO_Toggle.map 81.54KB
  22. 软件IIC_OLED/obj/makefile 2.28KB
  23. 软件IIC_OLED/obj/objects.mk 245B
  24. 软件IIC_OLED/obj/Peripheral/
  25. 软件IIC_OLED/obj/Peripheral/src/
  26. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_adc.d 4.29KB
  27. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_adc.o 72.09KB
  28. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_dbgmcu.d 4.3KB
  29. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_dbgmcu.o 17.31KB
  30. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_dma.d 4.29KB
  31. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_dma.o 28KB
  32. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_exti.d 4.29KB
  33. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_exti.o 23.13KB
  34. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_flash.d 4.29KB
  35. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_flash.o 87.98KB
  36. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_gpio.d 4.29KB
  37. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_gpio.o 44.78KB
  38. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_i2c.d 4.29KB
  39. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_i2c.o 62.08KB
  40. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_iwdg.d 4.29KB
  41. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_iwdg.o 17.82KB
  42. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_misc.d 4.29KB
  43. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_misc.o 19.64KB
  44. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_opa.d 4.29KB
  45. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_opa.o 16.28KB
  46. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_pwr.d 4.29KB
  47. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_pwr.o 26.76KB
  48. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_rcc.d 4.29KB
  49. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_rcc.o 52.62KB
  50. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_spi.d 4.29KB
  51. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_spi.o 40.27KB
  52. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_tim.d 4.29KB
  53. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_tim.o 168.53KB
  54. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_usart.d 4.29KB
  55. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_usart.o 58.27KB
  56. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_wwdg.d 4.29KB
  57. 软件IIC_OLED/obj/Peripheral/src/ch32v00x_wwdg.o 19.93KB
  58. 软件IIC_OLED/obj/Peripheral/src/subdir.mk 13.14KB
  59. 软件IIC_OLED/obj/sources.mk 610B
  60. 软件IIC_OLED/obj/Startup/
  61. 软件IIC_OLED/obj/Startup/startup_ch32v00x.d 112B
  62. 软件IIC_OLED/obj/Startup/startup_ch32v00x.o 6.28KB
  63. 软件IIC_OLED/obj/Startup/subdir.mk 1KB
  64. 软件IIC_OLED/obj/User/
  65. 软件IIC_OLED/obj/User/ch32v00x_it.d 4.22KB
  66. 软件IIC_OLED/obj/User/ch32v00x_it.o 12.28KB
  67. 软件IIC_OLED/obj/User/main.d 4.2KB
  68. 软件IIC_OLED/obj/User/main.o 21.84KB
  69. 软件IIC_OLED/obj/User/OLED.d 4.25KB
  70. 软件IIC_OLED/obj/User/OLED.o 56.53KB
  71. 软件IIC_OLED/obj/User/OLED_Font.d 4.21KB
  72. 软件IIC_OLED/obj/User/OLED_Font.o 12.14KB
  73. 软件IIC_OLED/obj/User/subdir.mk 1.27KB
  74. 软件IIC_OLED/obj/User/system_ch32v00x.d 4.23KB
  75. 软件IIC_OLED/obj/User/system_ch32v00x.o 23.66KB
  76. 软件IIC_OLED/User/
  77. 软件IIC_OLED/User/ch32v00x_conf.h 1.19KB
  78. 软件IIC_OLED/User/ch32v00x_it.c 1.29KB
  79. 软件IIC_OLED/User/ch32v00x_it.h 762B
  80. 软件IIC_OLED/User/main.c 2.6KB
  81. 软件IIC_OLED/User/OLED.c 7.72KB
  82. 软件IIC_OLED/User/OLED.h 567B
  83. 软件IIC_OLED/User/OLED_Font.c 8.86KB
  84. 软件IIC_OLED/User/OLED_Font.h 140B
  85. 软件IIC_OLED/User/system_ch32v00x.c 13.06KB
  86. 软件IIC_OLED/User/system_ch32v00x.h 1.03KB

资源介绍:

ch32v003f4p6通过软件IIC点亮oled灯
/********************************** (C) COPYRIGHT ******************************* * File Name : system_ch32v00x.c * Author : WCH * Version : V1.0.0 * Date : 2023/12/26 * Description : CH32V00x Device Peripheral Access Layer System Source File. ********************************************************************************* * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. * Attention: This software (modified or not) and binary are used for * microcontroller manufactured by Nanjing Qinheng Microelectronics. *******************************************************************************/ #include <ch32v00x> /* * Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after * reset the HSI is used as SYSCLK source). * If none of the define below is enabled, the HSI is used as System clock source. */ //#define SYSCLK_FREQ_8MHz_HSI 8000000 //#define SYSCLK_FREQ_24MHZ_HSI HSI_VALUE //#define SYSCLK_FREQ_48MHZ_HSI 48000000 //#define SYSCLK_FREQ_8MHz_HSE 8000000 //#define SYSCLK_FREQ_24MHz_HSE HSE_VALUE #define SYSCLK_FREQ_48MHz_HSE 48000000 /* Clock Definitions */ #ifdef SYSCLK_FREQ_8MHz_HSI uint32_t SystemCoreClock = SYSCLK_FREQ_8MHz_HSI; /* System Clock Frequency (Core Clock) */ #elif defined SYSCLK_FREQ_24MHZ_HSI uint32_t SystemCoreClock = SYSCLK_FREQ_24MHZ_HSI; /* System Clock Frequency (Core Clock) */ #elif defined SYSCLK_FREQ_48MHZ_HSI uint32_t SystemCoreClock = SYSCLK_FREQ_48MHZ_HSI; /* System Clock Frequency (Core Clock) */ #elif defined SYSCLK_FREQ_8MHz_HSE uint32_t SystemCoreClock = SYSCLK_FREQ_8MHz_HSE; /* System Clock Frequency (Core Clock) */ #elif defined SYSCLK_FREQ_24MHz_HSE uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz_HSE; /* System Clock Frequency (Core Clock) */ #elif defined SYSCLK_FREQ_48MHz_HSE uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz_HSE; /* System Clock Frequency (Core Clock) */ #else uint32_t SystemCoreClock = HSI_VALUE; #endif __I uint8_t AHBPrescTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8}; /* system_private_function_proto_types */ static void SetSysClock(void); #ifdef SYSCLK_FREQ_8MHz_HSI static void SetSysClockTo_8MHz_HSI(void); #elif defined SYSCLK_FREQ_24MHZ_HSI static void SetSysClockTo_24MHZ_HSI(void); #elif defined SYSCLK_FREQ_48MHZ_HSI static void SetSysClockTo_48MHZ_HSI(void); #elif defined SYSCLK_FREQ_8MHz_HSE static void SetSysClockTo_8MHz_HSE(void); #elif defined SYSCLK_FREQ_24MHz_HSE static void SetSysClockTo_24MHz_HSE(void); #elif defined SYSCLK_FREQ_48MHz_HSE static void SetSysClockTo_48MHz_HSE(void); #endif /********************************************************************* * @fn SystemInit * * @brief Setup the microcontroller system Initialize the Embedded Flash Interface, * the PLL and update the SystemCoreClock variable. * * @return none */ void SystemInit (void) { RCC->CTLR |= (uint32_t)0x00000001; RCC->CFGR0 &= (uint32_t)0xF8FF0000; RCC->CTLR &= (uint32_t)0xFEF6FFFF; RCC->CTLR &= (uint32_t)0xFFFBFFFF; RCC->CFGR0 &= (uint32_t)0xFFFEFFFF; RCC->INTR = 0x009F0000; RCC_AdjustHSICalibrationValue(0x10); SetSysClock(); } /********************************************************************* * @fn SystemCoreClockUpdate * * @brief Update SystemCoreClock variable according to Clock Register Values. * * @return none */ void SystemCoreClockUpdate (void) { uint32_t tmp = 0, pllsource = 0; tmp = RCC->CFGR0 & RCC_SWS; switch (tmp) { case 0x00: SystemCoreClock = HSI_VALUE; break; case 0x04: SystemCoreClock = HSE_VALUE; break; case 0x08: pllsource = RCC->CFGR0 & RCC_PLLSRC; if (pllsource == 0x00) { SystemCoreClock = HSI_VALUE * 2; } else { SystemCoreClock = HSE_VALUE * 2; } break; default: SystemCoreClock = HSI_VALUE; break; } tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)]; if(((RCC->CFGR0 & RCC_HPRE) >> 4) < 8>>= tmp; } } /********************************************************************* * @fn SetSysClock * * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. * * @return none */ static void SetSysClock(void) { RCC->APB2PCENR |= RCC_APB2Periph_GPIOD; GPIOD->CFGLR&=(~0xF0); GPIOD->CFGLR|=0x80; GPIOD->BSHR =0x2; //GPIO_IPD_Unused(); #ifdef SYSCLK_FREQ_8MHz_HSI SetSysClockTo_8MHz_HSI(); #elif defined SYSCLK_FREQ_24MHZ_HSI SetSysClockTo_24MHZ_HSI(); #elif defined SYSCLK_FREQ_48MHZ_HSI SetSysClockTo_48MHZ_HSI(); #elif defined SYSCLK_FREQ_8MHz_HSE SetSysClockTo_8MHz_HSE(); #elif defined SYSCLK_FREQ_24MHz_HSE SetSysClockTo_24MHz_HSE(); #elif defined SYSCLK_FREQ_48MHz_HSE SetSysClockTo_48MHz_HSE(); #endif /* If none of the define above is enabled, the HSI is used as System clock. * source (default after reset) */ } #ifdef SYSCLK_FREQ_8MHz_HSI /********************************************************************* * @fn SetSysClockTo_8MHz_HSI * * @brief Sets HSI as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers. * * @return none */ static void SetSysClockTo_8MHz_HSI(void) { /* Flash 0 wait state */ FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0; /* HCLK = SYSCLK = APB1 */ RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV3; } #elif defined SYSCLK_FREQ_24MHZ_HSI /********************************************************************* * @fn SetSysClockTo_24MHZ_HSI * * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 and PCLK1 prescalers. * * @return none */ static void SetSysClockTo_24MHZ_HSI(void) { /* Flash 0 wait state */ FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0; /* HCLK = SYSCLK = APB1 */ RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; } #elif defined SYSCLK_FREQ_48MHZ_HSI /********************************************************************* * @fn SetSysClockTo_48MHZ_HSI * * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 and PCLK1 prescalers. * * @return none */ static void SetSysClockTo_48MHZ_HSI(void) { uint8_t tmp = 0; tmp = *( uint8_t * )CFG0_PLL_TRIM; if(tmp != 0xFF) { RCC_AdjustHSICalibrationValue((tmp & 0x1F)); } /* Flash 0 wait state */ FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_1; /* HCLK = SYSCLK = APB1 */ RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PLL configuration: PLLCLK = HSI * 2 = 48 MHz */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC)); RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSI_Mul2); /* Enable PLL */ RCC->CTLR |= RCC_PLLON; /* Wait till PLL is ready */ while((RCC->CTLR & RCC_PLLRDY) == 0) { } /* Select PLL as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; /* Wait till PLL is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { } } #elif defined SYSCLK_FREQ_8MHz_HSE /********************************************************************* * @fn SetSysClockTo_8MHz_HSE *
100+评论
captcha
    相关资源