ZIPmatlab技巧的全部合集 4.83MB

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matlab技巧大全.zip 大约有9个文件
  1. matlab技巧大全/
  2. matlab技巧大全/inclk_switch/
  3. matlab技巧大全/inclk_switch/2.2.11. PLL输入时钟切换.mhtml 1.93MB
  4. matlab技巧大全/inclk_switch/QuartusPLL使用文档/
  5. matlab技巧大全/inclk_switch/quartus动态配置pll reconfig_quartus没有altpll-CSDN博客.mhtml 2.78MB
  6. matlab技巧大全/inclk_switch/ug-ag-clkpll-ch-683761-666922-zh-cn.pdf 722.42KB
  7. matlab技巧大全/inclk_switch/动态配置PLL：IOPLL Reconfig_pll配置-CSDN博客.mhtml 4.2MB
  8. matlab技巧大全/inclk_switch/屏幕截图 2024-11-14 224201.png 57.78KB
  9. matlab技巧大全/inclk_switch/手动时钟切换后 PLL 输出时钟的频率会更改吗？.mhtml 1.91MB

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matlab技巧的全部合集
<link href="/image.php?url=https://csdnimg.cn/release/download_crawler_static/css/base.min.css" rel="stylesheet"/><link href="/image.php?url=https://csdnimg.cn/release/download_crawler_static/css/fancy.min.css" rel="stylesheet"/><link href="/image.php?url=https://csdnimg.cn/release/download_crawler_static/90014976/7/raw.css" rel="stylesheet"/><div id="sidebar" style="display: none"><div id="outline"></div></div><div class="pf w0 h0" data-page-no="1" id="pf1"><div class="pc pc1 w0 h0"><img alt="" class="bi x0 y0 w1 h1" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/90014976/bg1.jpg"/><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">Intel</div><div class="t m0 x2 h3 y2 ff1 fs1 fc0 sc0 ls0 ws0">®</div><div class="t m0 x3 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0"> Agilex</div><div class="t m0 x4 h3 y2 ff1 fs1 fc0 sc0 ls0 ws0">™</div><div class="t m0 x5 h4 y1 ff2 fs0 fc0 sc1 ls0 ws0">时钟和<span class="_ _0"> </span><span class="ff1 sc0">PLL<span class="_ _0"> </span></span>用户指南</div><div class="t m0 x1 h5 y3 ff2 fs2 fc1 sc0 ls0 ws0">针对<span class="_ _1"> </span><span class="ff3">Intel</span></div><div class="t m0 x6 h6 y4 ff3 fs3 fc1 sc0 ls0 ws0">®</div><div class="t m0 x7 h7 y3 ff3 fs2 fc1 sc0 ls0 ws0"> Quartus</div><div class="t m0 x8 h6 y4 ff3 fs3 fc1 sc0 ls0 ws0">®</div><div class="t m0 x9 h5 y3 ff3 fs2 fc1 sc0 ls0 ws0"> Prime<span class="_ _1"> </span><span class="ff2">设计套件的更新：<span class="ff1">20.3</span></span></div><div class="t m0 x1 h5 y5 ff2 fs2 fc1 sc0 ls0 ws0">本翻译版本仅供参考，如果本翻译版本与其英文版本存在差异，则以英文版本为准。某些翻译版本尚未更新对应到最</div><div class="t m0 x1 h5 y6 ff2 fs2 fc1 sc0 ls0 ws0">新的英文版本，请参考</div><div class="t m0 xa h5 y7 ff2 fs2 fc0 sc1 ls0 ws0">英文版本<span class="fc1 sc0">以获取最新信息。</span></div><div class="t m0 xb h5 y8 ff2 fs2 fc0 sc1 ls0 ws0">在线版本</div><div class="t m0 xb h5 y9 ff2 fs2 fc0 sc1 ls0 ws0">发送反馈</div><div class="t m0 xc h7 ya ff1 fs2 fc0 sc0 ls0 ws0">UG-20216</div><div class="t m0 xd h7 yb ff3 fs2 fc1 sc0 ls0 ws0">ID: <span class="ff1 fc0">683761</span></div><div class="t m0 xe h5 yc ff2 fs2 fc1 sc0 ls0 ws0">版本<span class="ff3">: <span class="ff1 fc0">2021.12.13</span></span></div><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div><div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/90014976/bg2.jpg"><div class="t m0 xf h8 yd ff2 fs4 fc0 sc1 ls0 ws0">&#20869;&#23481;</div><div class="t m0 xf h7 ye ff1 fs2 fc1 sc0 ls0 ws0">1. Intel</div><div class="t m0 x10 h6 yf ff1 fs3 fc1 sc0 ls0 ws0">&#174;</div><div class="t m0 x11 h7 ye ff1 fs2 fc1 sc0 ls0 ws0"> Agilex</div><div class="t m0 x12 h6 yf ff1 fs3 fc1 sc0 ls0 ws0">&#8482;</div><div class="t m0 x13 h5 ye ff1 fs2 fc1 sc0 ls0 ws0"> <span class="ff2 sc2">&#26102;&#38047;&#21644;<span class="_ _1"> </span></span>PLL<span class="_ _1"> </span><span class="ff2 sc2">&#27010;&#36848;</span>..........................................................................................<span class="_ _2"> </span>4</div><div class="t m0 x14 h5 y10 ff3 fs2 fc1 sc0 ls0 ws0">1.1. <span class="ff2">&#26102;&#38047;&#32593;&#32476;&#27010;&#36848;</span>..........................................................................................................<span class="_ _3"> </span>4</div><div class="t m0 x14 h5 y11 ff3 fs2 fc1 sc0 ls0 ws0">1.2. PLL<span class="_ _1"> </span><span class="ff2">&#27010;&#36848;</span>................................................................................................................<span class="_ _4"></span>4</div><div class="t m0 xf h5 y12 ff1 fs2 fc1 sc0 ls0 ws0">2. Intel Agilex <span class="ff2 sc2">&#26102;&#38047;&#21644;<span class="_ _1"> </span></span>PLL<span class="_ _1"> </span><span class="ff2 sc2">&#26550;&#26500;&#21644;&#21151;&#33021;&#29305;&#24615;</span>................................................................................<span class="_"> </span>5</div><div class="t m0 x14 h5 y13 ff3 fs2 fc1 sc0 ls0 ws0">2.1. <span class="ff2">&#26102;&#38047;&#32593;&#32476;&#26550;&#26500;&#21644;&#21151;&#33021;&#29305;&#24615;</span>............................................................................................<span class="_ _2"> </span>5</div><div class="t m0 x15 h5 y14 ff3 fs2 fc1 sc0 ls0 ws0">2.1.1. <span class="ff2">&#26102;&#38047;&#32593;&#32476;&#26550;&#26500;</span>..............................................................................................<span class="_ _1"> </span>5</div><div class="t m0 x15 h5 y15 ff3 fs2 fc1 sc0 ls0 ws0">2.1.2. <span class="ff2">&#26102;&#38047;&#36164;&#28304;</span>....................................................................................................<span class="_ _4"></span>7</div><div class="t m0 x15 h5 y16 ff3 fs2 fc1 sc0 ls0 ws0">2.1.3. <span class="ff2">&#26102;&#38047;&#25511;&#21046;&#21151;&#33021;</span>..............................................................................................<span class="_ _1"> </span>8</div><div class="t m0 x14 h5 y17 ff3 fs2 fc1 sc0 ls0 ws0">2.2. PLL<span class="_ _1"> </span><span class="ff2">&#26550;&#26500;&#21644;&#21151;&#33021;&#29305;&#24615;</span>................................................................................................<span class="_ _1"> </span>10</div><div class="t m0 x15 h5 y18 ff3 fs2 fc1 sc0 ls0 ws0">2.2.1. PLL<span class="_ _1"> </span><span class="ff2">&#21151;&#33021;&#29305;&#24615;</span>.............................................................................................10</div><div class="t m0 x15 h5 y19 ff3 fs2 fc1 sc0 ls0 ws0">2.2.2. PLL<span class="_ _1"> </span><span class="ff2">&#20351;&#29992;</span>..................................................................................................<span class="_ _3"> </span>11</div><div class="t m0 x15 h5 y1a ff3 fs2 fc1 sc0 ls0 ws0">2.2.3. PLL<span class="_ _1"> </span><span class="ff2">&#20301;&#32622;</span>..................................................................................................<span class="_ _3"> </span>12</div><div class="t m0 x15 h5 y1b ff3 fs2 fc1 sc0 ls0 ws0">2.2.4. PLL<span class="_ _1"> </span><span class="ff2">&#26550;&#26500;</span>..................................................................................................<span class="_ _3"> </span>12</div><div class="t m0 x15 h5 y1c ff3 fs2 fc1 sc0 ls0 ws0">2.2.5. PLL<span class="_ _1"> </span><span class="ff2">&#25511;&#21046;&#20449;&#21495;</span>.............................................................................................13</div><div class="t m0 x15 h5 y1d ff3 fs2 fc1 sc0 ls0 ws0">2.2.6. PLL<span class="_ _1"> </span><span class="ff2">&#21453;&#39304;&#27169;&#24335;</span>.............................................................................................14</div><div class="t m0 x15 h5 y1e ff3 fs2 fc1 sc0 ls0 ws0">2.2.7. <span class="ff2">&#26102;&#38047;&#20056;&#27861;&#21644;&#38500;&#27861;</span>..........................................................................................<span class="_ _4"></span>18</div><div class="t m0 x15 h5 y1f ff3 fs2 fc1 sc0 ls0 ws0">2.2.8. <span class="ff2">&#21487;&#32534;&#31243;&#30456;&#31227;</span>...............................................................................................<span class="_ _1"> </span>19</div><div class="t m0 x15 h5 y20 ff3 fs2 fc1 sc0 ls0 ws0">2.2.9. <span class="ff2">&#21487;&#32534;&#31243;&#21344;&#31354;&#27604;</span>............................................................................................<span class="_"> </span>19</div><div class="t m0 x15 h5 y21 ff3 fs2 fc1 sc0 ls0 ws0">2.2.10. PLL<span class="_ _1"> </span><span class="ff2">&#32423;&#32852;</span>................................................................................................<span class="_ _1"> </span>19</div><div class="t m0 x15 h5 y22 ff3 fs2 fc1 sc0 ls0 ws0">2.2.11. PLL<span class="_ _1"> </span><span class="ff2">&#36755;&#20837;&#26102;&#38047;&#20999;&#25442;</span>.....................................................................................<span class="_ _5"> </span>20</div><div class="t m0 x15 h5 y23 ff3 fs2 fc1 sc0 ls0 ws0">2.2.12. PLL<span class="_ _1"> </span><span class="ff2">&#37325;&#37197;&#32622;&#21644;&#21160;&#24577;&#30456;&#31227;</span>................................................................................<span class="_ _6"></span>24</div><div class="t m0 x15 h5 y24 ff3 fs2 fc1 sc0 ls0 ws0">2.2.13. PLL<span class="_ _1"> </span><span class="ff2">&#26657;&#20934;</span>................................................................................................<span class="_ _1"> </span>24</div><div class="t m0 xf h5 y25 ff1 fs2 fc1 sc0 ls0 ws0">3. Intel Agilex <span class="ff2 sc2">&#26102;&#38047;&#21644;<span class="_ _1"> </span></span>PLL<span class="_ _1"> </span><span class="ff2 sc2">&#35774;&#35745;&#32771;&#37327;</span>.......................................................................................<span class="_ _6"> </span>26</div><div class="t m0 x14 h5 y26 ff3 fs2 fc1 sc0 ls0 ws0">3.1. <span class="ff2">&#25351;&#21335;&#65306;&#26102;&#38047;&#20999;&#25442;</span>......................................................................................................26</div><div class="t m0 x14 h5 y27 ff3 fs2 fc1 sc0 ls0 ws0">3.2. <span class="ff2">&#25351;&#21335;&#65306;&#26102;&#24207;&#25910;&#25947;</span>......................................................................................................27</div><div class="t m0 x14 h5 y28 ff3 fs2 fc1 sc0 ls0 ws0">3.3. <span class="ff2">&#25351;&#21335;&#65306;&#22797;&#20301;<span class="_ _1"> </span></span>PLL......................................................................................................<span class="_ _4"></span>27</div><div class="t m0 x14 h5 y29 ff3 fs2 fc1 sc0 ls0 ws0">3.4. <span class="ff2">&#25351;&#21335;&#65306;&#37197;&#32622;&#32422;&#26463;</span>......................................................................................................27</div><div class="t m0 x14 h5 y2a ff3 fs2 fc1 sc0 ls0 ws0">3.5. <span class="ff2">&#25351;&#21335;&#65306;</span>I/O PLL<span class="_ _1"> </span><span class="ff2">&#37325;&#37197;&#32622;</span>.............................................................................................<span class="_ _2"> </span>27</div><div class="t m0 x14 h5 y2b ff3 fs2 fc1 sc0 ls0 ws0">3.6. <span class="ff2">&#26102;&#38047;&#32422;&#26463;</span>..............................................................................................................<span class="_ _6"></span>28</div><div class="t m0 x14 h5 y2c ff3 fs2 fc1 sc0 ls0 ws0">3.7. IP<span class="_ _1"> </span><span class="ff2">&#26680;&#32422;&#26463;</span>.............................................................................................................<span class="_ _3"> </span>28</div><div class="t m0 x14 h9 y2d ff3 fs2 fc1 sc0 ls0 ws0">3.8. <span class="ff2">&#25351;&#21335;&#65306;&#20351;&#29992;&#20174;<span class="_ _1"> </span></span>L<span class="_ _7"></span>VDS SERDES Intel FPGA IP<span class="_ _1"> </span><span class="ff2">&#26469;&#30340;<span class="_ _1"> </span><span class="ff4 fs5">tx_outclk<span class="_ _1"> </span></span>&#31471;&#21475;&#65292;&#23454;&#29616;<span class="_ _1"> </span></span>f</div><div class="t m0 x16 h6 y2e ff3 fs3 fc1 sc0 ls0 ws0">OUT_EXT</div><div class="t m0 x17 h5 y2d ff3 fs2 fc1 sc0 ls0 ws0"> <span class="ff2">&#8805;</span> 300</div><div class="t m0 x15 h5 y2f ff3 fs2 fc1 sc0 ls0 ws0">Mhz<span class="_ _1"> </span><span class="ff2">&#30340;<span class="_ _1"> </span></span>5%<span class="ff2">&#21344;&#31354;&#27604;</span>................................................................................................28</div><div class="t m0 xf h5 y30 ff1 fs2 fc1 sc0 ls0 ws0">4. Clock Control Intel FPGA IP<span class="_ _1"> </span><span class="ff2 sc2">&#26680;</span>......................................................................................<span class="_ _3"> </span>29</div><div class="t m0 x14 h5 y31 ff3 fs2 fc1 sc0 ls0 ws0">4.1. Clock Control Intel FPGA IP<span class="_ _1"> </span><span class="ff2">&#30340;&#21457;&#24067;&#20449;&#24687;</span>....................................................................<span class="_ _4"></span>29</div><div class="t m0 x14 h5 y32 ff3 fs2 fc1 sc0 ls0 ws0">4.2. Clock Control IP<span class="_ _1"> </span><span class="ff2">&#26680;&#21442;&#25968;</span>.........................................................................................<span class="_ _6"></span>29</div><div class="t m0 x14 h5 y33 ff3 fs2 fc1 sc0 ls0 ws0">4.3. Clock Control IP<span class="_ _1"> </span><span class="ff2">&#26680;&#31471;&#21475;&#21644;&#20449;&#21495;</span>.................................................................................30</div><div class="t m0 xf h5 y34 ff1 fs2 fc1 sc0 ls0 ws0">5. IOPLL Intel FPGA IP<span class="_ _1"> </span><span class="ff2 sc2">&#26680;</span>.................................................................................................<span class="_ _1"> </span>31</div><div class="t m0 x14 h5 y35 ff3 fs2 fc1 sc0 ls0 ws0">5.1. IOPLL Intel FPGA IP<span class="_ _1"> </span><span class="ff2">&#30340;&#21457;&#24067;&#20449;&#24687;</span>..............................................................................<span class="_ _3"> </span>31</div><div class="t m0 x14 h5 y36 ff3 fs2 fc1 sc0 ls0 ws0">5.2. .mif<span class="_ _1"> </span><span class="ff2">&#25991;&#20214;&#29983;&#25104;</span>........................................................................................................<span class="_ _6"></span>31</div><div class="t m0 x15 h5 y37 ff3 fs2 fc1 sc0 ls0 ws0">5.2.1. <span class="ff2">&#29983;&#25104;&#19968;&#20010;&#26032;&#30340;</span>.mif<span class="_ _1"> </span><span class="ff2">&#25991;&#20214;</span>.................................................................................<span class="_ _6"> </span>32</div><div class="t m0 x15 h5 y38 ff3 fs2 fc1 sc0 ls0 ws0">5.2.2. <span class="ff2">&#23545;&#29616;&#26377;</span>.mif<span class="_ _1"> </span><span class="ff2">&#25991;&#20214;&#28155;&#21152;&#37197;&#32622;</span>..............................................................................<span class="_ _3"> </span>32</div><div class="t m0 x14 h5 y39 ff3 fs2 fc1 sc0 ls0 ws0">5.3. IP-<span class="_ _7"></span>XACT<span class="_ _1"> </span><span class="ff2">&#25991;&#20214;&#29983;&#25104;</span>..................................................................................................<span class="_ _8"> </span>32</div><div class="t m2 x18 ha y3a ff2 fs6 fc1 sc2 ls0 ws0">&#20869;&#23481;</div><div class="t m0 xf hb y3b ff3 fs7 fc1 sc0 ls0 ws0">Intel</div><div class="t m0 x19 hc y3c ff3 fs8 fc1 sc0 ls0 ws0">&#174;</div><div class="t m0 x1a hb y3b ff3 fs7 fc1 sc0 ls0 ws0"> Agilex</div><div class="t m0 x1b hc y3c ff3 fs8 fc1 sc0 ls0 ws0">&#8482;</div><div class="t m0 x1c hd y3b ff2 fs7 fc1 sc0 ls0 ws0">&#26102;&#38047;&#21644;<span class="_ _3"> </span><span class="ff3">PLL<span class="_ _3"> </span></span>&#29992;&#25143;&#25351;&#21335;</div><div class="t m0 x1d hd y3d ff2 fs7 fc0 sc1 ls0 ws0">&#21457;&#36865;&#21453;&#39304;</div><div class="t m0 xf hb y3e ff3 fs7 fc1 sc0 ls0 ws0">2</div><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div><div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/90014976/bg3.jpg"><div class="t m0 x2 h5 y3f ff3 fs2 fc1 sc0 ls0 ws0">5.3.1. <span class="ff2">&#29983;&#25104;&#19968;&#20010;&#26032;&#30340;<span class="_ _1"> </span></span>IP-<span class="_ _7"></span>XACT<span class="_ _1"> </span><span class="ff2">&#25991;&#20214;</span>..........................................................................<span class="_ _5"> </span>32</div><div class="t m0 x1e h5 y40 ff3 fs2 fc1 sc0 ls0 ws0">5.4. IOPLL IP<span class="_ _1"> </span><span class="ff2">&#26680;&#21442;&#25968;</span>...................................................................................................<span class="_ _3"> </span>32</div><div class="t m0 x2 h5 y41 ff3 fs2 fc1 sc0 ls0 ws0">5.4.1. IOPLL IP<span class="_ _1"> </span><span class="ff2">&#26680;&#21442;&#25968;&#65306;</span>PLL<span class="_ _1"> </span><span class="ff2">&#36873;&#39033;&#21345;</span>.......................................................................<span class="_ _6"></span>33</div><div class="t m0 x2 h5 y42 ff3 fs2 fc1 sc0 ls0 ws0">5.4.2. IOPLL IP<span class="_ _1"> </span><span class="ff2">&#26680;&#21442;&#25968;&#65306;</span>Settings<span class="_ _1"> </span><span class="ff2">&#36873;&#39033;&#21345;</span>................................................................<span class="_ _1"> </span>35</div><div class="t m0 x2 h5 y43 ff3 fs2 fc1 sc0 ls0 ws0">5.4.3. IOPLL IP<span class="_ _1"> </span><span class="ff2">&#26680;&#21442;&#25968;&#65306;</span>Cascading<span class="_ _1"> </span><span class="ff2">&#36873;&#39033;&#21345;</span>..............................................................36</div><div class="t m0 x2 h5 y44 ff3 fs2 fc1 sc0 ls0 ws0">5.4.4. IOPLL IP<span class="_ _1"> </span><span class="ff2">&#26680;&#21442;&#25968;</span> - Dynamic R<span class="_ _7"></span>econfiguration<span class="_ _1"> </span><span class="ff2">&#36873;&#39033;&#21345;</span>.........................................<span class="_ _4"></span>36</div><div class="t m0 x2 h5 y45 ff3 fs2 fc1 sc0 ls0 ws0">5.4.5. IOPLL IP<span class="_ _1"> </span><span class="ff2">&#26680;&#21442;&#25968;</span> - Advanced P<span class="_ _7"></span>arameters<span class="_ _1"> </span><span class="ff2">&#36873;&#39033;&#21345;</span>.............................................<span class="_ _3"> </span>37</div><div class="t m0 x1e h5 y46 ff3 fs2 fc1 sc0 ls0 ws0">5.5. IOPLL IP<span class="_ _1"> </span><span class="ff2">&#26680;&#31471;&#21475;&#21644;&#20449;&#21495;</span>...........................................................................................<span class="_ _8"> </span>37</div><div class="t m0 x1 h5 y47 ff1 fs2 fc1 sc0 ls0 ws0">6. Intel FPGA IP<span class="_ _1"> </span><span class="ff2 sc2">&#26680;</span>............................................................................................................<span class="_ _4"></span>39</div><div class="t m0 x1e h5 y48 ff3 fs2 fc1 sc0 ls0 ws0">6.1. IOPLL Reconfig <span class="_ _7"></span>Intel FPGA IP<span class="_ _1"> </span><span class="ff2">&#30340;&#21457;&#24067;&#20449;&#24687;</span>.................................................................<span class="_"> </span>39</div><div class="t m0 x1e h5 y49 ff3 fs2 fc1 sc0 ls0 ws0">6.2. <span class="ff2">&#23454;&#29616;<span class="_ _1"> </span></span>IOPLL Reconfig IP<span class="_ _3"> </span><span class="ff2">&#26680;&#20013;&#30340;<span class="_ _1"> </span></span>I/O PLL<span class="_ _1"> </span><span class="ff2">&#37325;&#37197;&#32622;</span>.............................................................<span class="_ _2"> </span>40</div><div class="t m0 x2 h5 y4a ff3 fs2 fc1 sc0 ls0 ws0">6.2.1. IOPLL<span class="_ _1"> </span><span class="ff2">&#19982;<span class="_ _1"> </span></span>IOPLL R<span class="_ _7"></span>econfig IP<span class="_ _1"> </span><span class="ff2">&#26680;&#20043;&#38388;&#30340;&#36830;&#25509;</span>......................................................<span class="_ _1"> </span>40</div><div class="t m0 x2 h5 y4b ff3 fs2 fc1 sc0 ls0 ws0">6.2.2. <span class="ff2">&#36830;&#25509;<span class="_ _1"> </span></span>IOPLL<span class="_ _1"> </span><span class="ff2">&#21644;<span class="_ _1"> </span></span>IOPLL Reconfig<span class="_ _7"></span> IP<span class="_ _1"> </span><span class="ff2">&#26680;</span>...............................................................<span class="_ _4"></span>40</div><div class="t m0 x1e h5 y4c ff3 fs2 fc1 sc0 ls0 ws0">6.3. IOPLL Reconfig <span class="_ _7"></span>IP<span class="_ _1"> </span><span class="ff2">&#26680;&#37325;&#37197;&#32622;&#27169;&#24335;</span>..............................................................................<span class="_ _1"> </span>41</div><div class="t m0 x2 h5 y4d ff3 fs2 fc1 sc0 ls0 ws0">6.3.1. .mif<span class="_ _1"> </span><span class="ff2">&#27969;&#37325;&#37197;&#32622;</span>............................................................................................<span class="_ _6"></span>41</div><div class="t m0 x2 h5 y4e ff3 fs2 fc1 sc0 ls0 ws0">6.3.2. <span class="ff2">&#39640;&#32423;&#27169;&#24335;&#37325;&#37197;&#32622;</span>..........................................................................................<span class="_ _4"></span>42</div><div class="t m0 x2 h5 y4f ff3 fs2 fc1 sc0 ls0 ws0">6.3.3. <span class="ff2">&#26102;&#38047;&#38376;&#25511;&#37325;&#26032;&#37197;&#32622;</span>.......................................................................................<span class="_ _8"> </span>43</div><div class="t m0 x2 h5 y50 ff3 fs2 fc1 sc0 ls0 ws0">6.3.4. <span class="ff2">&#21160;&#24577;&#30456;&#31227;&#37325;&#37197;&#32622;</span>..........................................................................................<span class="_ _4"></span>43</div><div class="t m0 x1e h5 y51 ff3 fs2 fc1 sc0 ls0 ws0">6.4. IOPLL Reconfig <span class="_ _7"></span>IP<span class="_ _1"> </span><span class="ff2">&#26680;&#20013;&#30340;<span class="_ _1"> </span></span>Avalon Memory<span class="_ _7"></span>-Mapped Interface<span class="_ _1"> </span><span class="ff2">&#31471;&#21475;</span>.................................<span class="_ _9"> </span>43</div><div class="t m0 x1e h5 y52 ff3 fs2 fc1 sc0 ls0 ws0">6.5. <span class="ff2">&#22320;&#22336;&#24635;&#32447;&#26680;&#25968;&#25454;&#24635;&#32447;&#35774;&#32622;</span>...........................................................................................<span class="_ _4"></span>44</div><div class="t m0 x2 h5 y53 ff3 fs2 fc1 sc0 ls0 ws0">6.5.1. <span class="ff2">&#39640;&#32423;&#27169;&#24335;&#37325;&#37197;&#32622;&#30340;&#22320;&#22336;&#24635;&#32447;&#21644;&#25968;&#25454;&#24635;&#32447;&#35774;&#32622;</span>.........................................................<span class="_ _4"></span>44</div><div class="t m0 x2 h5 y54 ff3 fs2 fc1 sc0 ls0 ws0">6.5.2. <span class="ff2">&#38024;&#23545;&#26102;&#38047;&#38376;&#25511;&#37325;&#37197;&#32622;&#30340;&#36755;&#20986;&#26102;&#38047;&#21644;&#30456;&#24212;&#25968;&#25454;&#20301;&#35774;&#32622;</span>................................................<span class="_"> </span>50</div><div class="t m0 x2 h5 y55 ff3 fs2 fc1 sc0 ls0 ws0">6.5.3. <span class="ff2">&#38024;&#23545;<span class="_ _1"> </span></span>IOPLL Reconfig<span class="_ _7"></span> IP<span class="_ _1"> </span><span class="ff2">&#26680;&#21160;&#24577;&#30456;&#31227;&#30340;&#25968;&#25454;&#24635;&#32447;&#35774;&#32622;</span>.............................................<span class="_ _4"></span>51</div><div class="t m0 x1e h5 y56 ff3 fs2 fc1 sc0 ls0 ws0">6.6. <span class="ff2">&#35774;&#35745;&#23454;&#20363;</span>..............................................................................................................<span class="_ _6"></span>51</div><div class="t m0 x2 h5 y57 ff3 fs2 fc1 sc0 ls0 ws0">6.6.1. <span class="ff2">&#37325;&#37197;&#32622;&#36873;&#39033;&#65306;&#20351;&#29992;<span class="_ _1"> </span></span>IOPLL Reconfig<span class="_ _7"></span> IP<span class="_ _1"> </span><span class="ff2">&#26680;&#30340;</span>.mif<span class="_ _1"> </span><span class="ff2">&#27969;&#37325;&#37197;&#32622;</span>......................................<span class="_"> </span>52</div><div class="t m0 x2 h5 y58 ff3 fs2 fc1 sc0 ls0 ws0">6.6.2. <span class="ff2">&#37325;&#37197;&#32622;&#36873;&#39033;&#65306;&#20351;&#29992;<span class="_ _1"> </span></span>IOPLL Reconfig<span class="_ _7"></span> IP<span class="_ _1"> </span><span class="ff2">&#26680;&#30340;&#39640;&#32423;&#27169;&#24335;&#37325;&#37197;&#32622;&#21644;&#37325;&#26032;&#26657;&#20934;</span>.......................<span class="_ _4"></span>52</div><div class="t m0 x2 h5 y59 ff3 fs2 fc1 sc0 ls0 ws0">6.6.3. <span class="ff2">&#37325;&#37197;&#32622;&#36873;&#39033;&#65306;&#20351;&#29992;<span class="_ _1"> </span></span>IOPLL Reconfig<span class="_ _7"></span> IP<span class="_ _1"> </span><span class="ff2">&#26680;&#30340;&#26102;&#38047;&#38376;&#25511;&#37325;&#37197;&#32622;</span>....................................<span class="_ _2"> </span>53</div><div class="t m0 x1 h5 y5a ff1 fs2 fc1 sc0 ls0 ws0">7. Intel Agilex <span class="ff2 sc2">&#26102;&#38047;&#21644;<span class="_ _1"> </span></span>PLL<span class="_ _1"> </span><span class="ff2 sc2">&#29992;&#25143;&#25351;&#21335;&#23384;&#26723;</span>.................................................................................<span class="_ _5"> </span>54</div><div class="t m0 x1 h5 y5b ff1 fs2 fc1 sc0 ls0 ws0">8. Intel Agilex <span class="ff2 sc2">&#26102;&#38047;&#21644;<span class="_ _1"> </span></span>PLL<span class="_ _1"> </span><span class="ff2 sc2">&#29992;&#25143;&#25351;&#21335;&#25991;&#26723;&#20462;&#35746;&#21382;&#21490;</span>......................................................................<span class="_ _1"> </span>55</div><div class="t m2 x1 ha y5c ff2 fs6 fc1 sc2 ls0 ws0">&#20869;&#23481;</div><div class="t m0 xb hd y3d ff2 fs7 fc0 sc1 ls0 ws0">&#21457;&#36865;&#21453;&#39304;</div><div class="t m0 x1f hb y3b ff3 fs7 fc1 sc0 ls0 ws0">Intel</div><div class="t m0 x20 hc y3c ff3 fs8 fc1 sc0 ls0 ws0">&#174;</div><div class="t m0 x21 hb y3b ff3 fs7 fc1 sc0 ls0 ws0"> Agilex</div><div class="t m0 x22 hc y3c ff3 fs8 fc1 sc0 ls0 ws0">&#8482;</div><div class="t m0 x23 hd y3b ff2 fs7 fc1 sc0 ls0 ws0">&#26102;&#38047;&#21644;<span class="_ _3"> </span><span class="ff3">PLL<span class="_ _9"> </span></span>&#29992;&#25143;&#25351;&#21335;</div><div class="t m0 x24 hb y3e ff3 fs7 fc1 sc0 ls0 ws0">3</div><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div><div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/90014976/bg4.jpg"><div class="t m0 xf he y5d ff1 fs4 fc0 sc0 ls0 ws0">1. Intel</div><div class="t m0 x25 hf y5e ff1 fs9 fc0 sc0 ls0 ws0">&#174;</div><div class="t m0 x26 he y5d ff1 fs4 fc0 sc0 ls0 ws0"> Agilex</div><div class="t m0 x27 hf y5e ff1 fs9 fc0 sc0 ls0 ws0">&#8482;</div><div class="t m0 x28 h8 y5d ff1 fs4 fc0 sc0 ls0 ws0"> <span class="ff2 sc1">&#26102;&#38047;&#21644;<span class="_ _a"> </span></span>PLL<span class="_ _a"> </span><span class="ff2 sc1">&#27010;&#36848;</span></div><div class="t m0 xf h10 y5f ff1 fsa fc0 sc0 ls0 ws0">1.1. <span class="ff2 sc1">&#26102;&#38047;&#32593;&#32476;&#27010;&#36848;</span></div><div class="t m0 x29 h7 y60 ff3 fs2 fc1 sc0 ls0 ws0">Intel</div><div class="t m0 x2a h6 y61 ff3 fs3 fc1 sc0 ls0 ws0">&#174;</div><div class="t m0 x2b h7 y60 ff3 fs2 fc1 sc0 ls0 ws0"> Agilex</div><div class="t m0 x2c h6 y61 ff3 fs3 fc1 sc0 ls0 ws0">&#8482;</div><div class="t m0 x2d h5 y60 ff3 fs2 fc1 sc0 ls0 ws0"> <span class="ff2">&#22120;&#20214;&#21253;&#21547;&#23558;&#20449;&#21495;&#20998;&#24067;&#21040;&#25972;&#20010;&#26550;&#26500;&#30340;&#19987;&#29992;&#36164;&#28304;&#12290;&#36890;&#24120;&#65292;&#36825;&#20123;&#36164;&#28304;&#29992;&#20110;&#26102;&#38047;&#20449;&#21495;&#65292;&#20063;&#21487;</span></div><div class="t m0 x29 h5 y62 ff2 fs2 fc1 sc0 ls0 ws0">&#20197;&#29992;&#20110;&#37027;&#20123;&#35201;&#27714;&#20302;&#20559;&#31227;&#30340;&#20854;&#20182;&#20449;&#21495;&#12290;&#22312;<span class="ff3"> Intel Agilex </span>&#22120;&#20214;&#20013;&#65292;&#36825;&#20123;&#36164;&#28304;&#20316;&#20026;&#21487;&#32534;&#31243;&#30340;&#26102;&#38047;&#24067;&#32447;&#23454;</div><div class="t m0 x29 h5 y63 ff2 fs2 fc1 sc0 ls0 ws0">&#29616;&#65292;&#24182;&#20801;&#35768;&#29992;&#20110;&#21508;&#31181;&#35268;&#27169;&#30340;&#20302;&#20559;&#31227;&#26102;&#38047;&#26641;&#30340;&#23454;&#29616;&#12290;</div><div class="t m0 x29 h5 y64 ff2 fs2 fc0 sc1 ls0 ws0">&#30456;&#20851;&#38142;&#25509;</div><div class="t m0 x29 h5 y65 ff2 fs2 fc0 sc0 ls0 ws0">&#20351;&#29992;&#20840;&#23616;&#26102;&#38047;&#32593;&#32476;&#36164;&#28304;&#65292;<span class="ff3">Intel Quartus</span></div><div class="t m0 x2e h6 y66 ff3 fs3 fc0 sc0 ls0 ws0">&#174;</div><div class="t m0 x2f h5 y65 ff3 fs2 fc0 sc0 ls0 ws0"> Prime Pro Edition<span class="_ _1"> </span><span class="ff2">&#29992;&#25143;&#25351;&#21335;&#65306;&#35774;&#35745;&#24314;&#35758;</span></div><div class="t m0 x30 h5 y67 ff2 fs2 fc1 sc0 ls0 ws0">&#25552;&#20379;&#26377;&#20851;<span class="_ _1"> </span><span class="ff3">Intel Quartus</span></div><div class="t m0 x31 h6 y68 ff3 fs3 fc1 sc0 ls0 ws0">&#174;</div><div class="t m0 x32 h5 y67 ff3 fs2 fc1 sc0 ls0 ws0"> Prime<span class="_ _1"> </span><span class="ff2">&#36719;&#20214;&#20013;&#26102;&#38047;&#20998;&#37197;&#30340;&#26356;&#22810;&#20449;&#24687;&#12290;</span></div><div class="t m0 xf h10 y69 ff1 fsa fc0 sc0 ls0 ws0">1.2. PLL<span class="_ _b"> </span><span class="ff2 sc1">&#27010;&#36848;</span></div><div class="t m0 x29 h5 y6a ff2 fs2 fc1 sc0 ls0 ws0">&#38145;&#30456;&#29615;&#65288;<span class="ff3">PLL</span>&#65289;&#23545;&#22120;&#20214;&#26102;&#38047;&#31649;&#29702;&#12289;&#22806;&#37096;&#31995;&#32479;&#26102;&#38047;&#31649;&#29702;&#20197;&#21450;&#39640;&#36895;<span class="_ _1"> </span><span class="ff3">I/O<span class="_ _1"> </span></span>&#25509;&#21475;&#25552;&#20379;&#24378;&#20581;&#30340;&#26102;&#38047;&#31649;&#29702;&#19982;&#32508;&#21512;&#12290;</div><div class="t m0 x29 h5 y6b ff3 fs2 fc1 sc0 ls0 ws0">Intel Agilex <span class="ff2">&#22120;&#20214;&#31995;&#21015;&#21253;&#21547;&#20197;&#19979;<span class="_ _1"> </span></span>I/O PLL<span class="_ _1"> </span><span class="ff2">&#29992;&#20110;&#20869;&#26680;&#24212;&#29992;&#31243;&#24207;&#12290;</span>I/O PLL<span class="_ _1"> </span><span class="ff2">&#21482;&#33021;&#29992;&#20316;&#25972;&#25968;<span class="_ _1"> </span></span>PLL<span class="ff2">&#12290;</span></div><div class="t m0 x29 h11 y6c ff5 fs2 fc1 sc0 ls0 ws0">&#8226;<span class="_ _c"> </span><span class="ff3">F<span class="_ _7"></span>abric-feeding I/O PLLs<span class="ff2">&#8212;&#26377;<span class="_ _1"> </span></span>3<span class="_ _1"> </span><span class="ff2">&#20010;<span class="_ _1"> </span><span class="ff4 fs5">C<span class="_ _1"> </span></span>&#35745;&#25968;&#22120;&#36755;&#20986;&#21487;&#29992;&#65292;&#19981;&#25903;&#25345;<span class="_ _1"> </span></span>PLL<span class="_ _1"> </span><span class="ff2">&#32423;&#32852;&#12290;</span></span></div><div class="t m0 x29 h11 y6d ff5 fs2 fc1 sc0 ls0 ws0">&#8226;<span class="_ _c"> </span><span class="ff3">I/O bank I/O PLLs<span class="ff2">&#8212;&#26377;<span class="_ _1"> </span></span>7<span class="_ _1"> </span><span class="ff2">&#20010;<span class="_ _1"> </span><span class="ff4 fs5">C<span class="_ _1"> </span></span>&#35745;&#25968;&#22120;&#36755;&#20986;&#21487;&#29992;&#65292;&#19981;&#25903;&#25345;<span class="_ _1"> </span></span>PLL<span class="_ _1"> </span><span class="ff2">&#32423;&#32852;</span></span></div><div class="t m0 x29 h5 y6e ff3 fs2 fc1 sc0 ls0 ws0">I/O PLL<span class="_ _1"> </span><span class="ff2">&#22312;&#19982;<span class="_ _1"> </span></span>I/O Bank<span class="_ _1"> </span><span class="ff2">&#20013;&#30340;&#30828;&#23384;&#20648;&#25511;&#21046;&#22120;&#21644;<span class="_ _1"> </span></span>L<span class="_ _7"></span>VDS<span class="_ _1"> </span><span class="ff2">&#20018;&#21270;&#22120;</span>/<span class="ff2">&#35299;&#20018;&#22120;</span> (SERDES) <span class="ff2">&#22359;&#30456;&#37051;&#30340;&#20301;&#32622;&#12290;&#27599;</span></div><div class="t m0 x29 h5 y6f ff2 fs2 fc1 sc0 ls0 ws0">&#20010;<span class="_ _1"> </span><span class="ff3">I/O bank<span class="_ _1"> </span></span>&#21253;&#21547;<span class="_ _1"> </span><span class="ff3">2<span class="_ _1"> </span></span>&#20010;<span class="_ _1"> </span><span class="ff3">I/O bank I/O PLL<span class="_ _1"> </span></span>&#21644;&#19968;&#20010;&#26550;&#26500;&#39304;&#32473;<span class="_ _1"> </span><span class="ff3">I/O PLL</span>&#12290;</div><div class="t m0 x1 hb y70 ff1 fs7 fc0 sc0 ls0 ws0">683761 | 2021.12.13</div><div class="t m0 xb hd y71 ff2 fs7 fc0 sc1 ls0 ws0">&#21457;&#36865;&#21453;&#39304;</div><div class="t m0 x33 hd y72 ff2 fs7 fc1 sc0 ls1 ws0">&#33521;&#29305;&#23572;&#20844;&#21496;&#12290;&#20445;&#30041;&#25152;&#26377;&#26435;&#21033;<span class="ls0">&#12290;&#33521;&#29305;&#23572;<span class="_ _4"></span>&#12289;</span>&#33521;&#29305;&#23572;&#24509;&#26631;&#21644;&#20854;&#20182;&#33521;&#29305;&#23572;&#26631;&#24535;&#26159;&#33521;&#29305;&#23572;&#20844;&#21496;&#25110;&#20854;&#23376;&#20844;&#21496;&#30340;&#21830;&#26631;&#12290;&#20381;&#29031;&#33521;&#29305;&#23572;&#30340;&#26631;&#20934;&#20445;&#35777;&#26465;</div><div class="t m0 x33 hd y73 ff2 fs7 fc1 sc0 ls0 ws0">&#20363;&#65292;<span class="ls2">&#33521;&#29305;&#23572;&#20445;&#35777;&#20854;<span class="_ _3"> </span></span><span class="ff3">FPGA<span class="_ _3"> </span></span><span class="ls2">&#21644;&#21322;&#23548;&#20307;&#20135;&#21697;&#30340;&#24615;&#33021;&#31526;&#21512;&#24403;&#21069;&#35268;&#26684;&#65292;&#20294;&#20445;&#30041;&#38543;&#26102;&#26356;&#25913;&#20219;&#20309;&#20135;&#21697;&#21644;&#26381;&#21153;&#30340;&#26435;&#21033;&#65292;&#24661;&#19981;&#21478;&#34892;&#36890;&#30693;</span>&#12290;&#33521;&#29305;&#23572;&#27010;</div><div class="t m0 x33 hd y74 ff2 fs7 fc1 sc0 ls1 ws0">&#19981;&#25215;&#25285;&#22240;&#24212;&#29992;&#25110;&#20351;&#29992;&#26412;&#25991;&#20013;&#25551;&#36848;&#30340;&#20219;&#20309;&#20449;&#24687;&#12289;&#20135;&#21697;&#25110;&#26381;&#21153;&#32780;&#20135;&#29983;&#30340;&#20219;&#20309;&#36131;&#20219;&#21644;&#20041;&#21153;&#65292;&#38500;&#38750;&#24471;&#21040;&#33521;&#29305;&#23572;&#20070;&#38754;&#19978;&#30340;&#26126;&#30830;&#21516;&#24847;<span class="ls0">&#12290;&#24314;&#35758;&#33521;</span></div><div class="t m0 x33 hd y75 ff2 fs7 fc1 sc0 ls0 ws0">&#29305;&#23572;&#23458;&#25143;&#22312;&#20449;&#36182;&#20219;&#20309;&#24050;&#21457;&#24067;&#30340;&#20449;&#24687;&#20043;&#21069;&#20197;&#21450;&#19979;&#21333;&#35746;&#36141;&#20135;&#21697;&#25110;&#26381;&#21153;&#20043;&#21069;&#65292;&#24212;&#20808;&#33719;&#21462;&#26368;&#26032;&#29256;&#26412;&#30340;&#22120;&#20214;&#35268;&#26684;&#12290;</div><div class="t m0 x33 hd y76 ff3 fs7 fc1 sc0 ls0 ws0">*<span class="ff2">&#20854;&#20182;&#30340;&#21517;&#31216;&#21644;&#21697;&#29260;&#21487;&#33021;&#26159;&#20854;&#20182;&#25152;&#26377;&#32773;&#30340;&#36164;&#20135;&#12290;</span></div><div class="t m0 x34 hb y77 ff1 fs7 fc0 sc0 ls0 ws0">ISO</div><div class="t m0 x34 hb y78 ff1 fs7 fc0 sc0 ls0 ws0">9001:2015</div><div class="t m0 x34 hb y79 ff1 fs7 fc0 sc0 ls0 ws0">Registered</div><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div><div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="/image.php?url=https://csdnimg.cn/release/download_crawler_static/90014976/bg5.jpg"><div class="t m0 xf h8 y5d ff1 fs4 fc0 sc0 ls0 ws0">2. Intel Agilex <span class="ff2 sc1">&#26102;&#38047;&#21644;<span class="_ _a"> </span></span>PLL<span class="_ _a"> </span><span class="ff2 sc1">&#26550;&#26500;&#21644;&#21151;&#33021;&#29305;&#24615;</span></div><div class="t m0 xf h10 y5f ff1 fsa fc0 sc0 ls0 ws0">2.1. <span class="ff2 sc1">&#26102;&#38047;&#32593;&#32476;&#26550;&#26500;&#21644;&#21151;&#33021;&#29305;&#24615;</span></div><div class="t m0 xf h12 y7a ff1 fsb fc0 sc0 ls0 ws0">2.1.1. <span class="ff2 sc1">&#26102;&#38047;&#32593;&#32476;&#26550;&#26500;</span></div><div class="t m0 x29 h5 y7b ff2 fs2 fc1 sc0 ls0 ws0">&#27599;&#20010;<span class="ff3"> Intel Agilex </span>&#22120;&#20214;&#34987;&#20998;&#25104;&#19968;&#20123;&#22823;&#23567;&#22343;&#21248;&#30340;&#26102;&#38047;&#21306;&#22495;&#65288;<span class="ff3">clock sector</span>&#65289;&#12290;</div><div class="t m0 xf h5 y7c ff2 fs2 fc0 sc1 ls0 ws0">&#22270;<span class="ff1 sc0"> 1.</span></div><div class="t m0 x35 h5 y7d ff1 fs2 fc0 sc0 ls0 ws0">Intel Agilex <span class="ff2 sc1">&#22120;&#20214;&#30340;&#26102;&#38047;&#21306;&#22495;</span>(clock sector)<span class="ff2 sc1">&#24179;&#38754;&#22270;</span></div><div class="t m0 x29 hd y7e ff2 fs7 fc1 sc0 ls0 ws0">&#35813;&#22270;&#26174;&#31034;<span class="ff3"> Intel Agilex </span>&#22120;&#20214;&#20013;&#30340;&#26102;&#38047;&#21306;&#22495;&#31034;&#20363;&#65292;<span class="ff3"> </span>&#20854;&#20013;&#30340;&#26102;&#38047;&#21306;&#22495;&#20197;&#38453;&#21015;&#23454;&#29616;&#8212;&#26412;&#31034;&#20363;&#20013;&#20026;<span class="_ _3"> </span><span class="ff3">5<span class="_ _9"> </span></span>&#34892;&#21644;<span class="_ _3"> </span><span class="ff3">6<span class="_ _3"> </span></span>&#21015;&#12290;<span class="ff3">I/O bank<span class="_ _3"> </span></span>&#20301;&#20110;<span class="ff3"> Intel</span></div><div class="t m0 x29 hd y7f ff3 fs7 fc1 sc0 ls0 ws0">Agilex <span class="ff2">&#22120;&#20214;&#30340;&#39030;&#37096;&#21644;&#24213;&#37096;&#12290;</span></div><div class="c x36 y80 w2 h13"><div class="t m0 x37 h14 y81 ff6 fs9 fc1 sc0 ls0 ws0">Clock Sector</div><div class="t m0 x37 h15 y82 ff6 fs9 fc1 sc0 ls0 ws0">I/O Bank<span class="ff2">&#34892;</span></div><div class="t m0 x38 h15 y83 ff6 fs9 fc1 sc0 ls0 ws0">I/O Bank<span class="ff2">&#34892;</span></div></div><div class="t m0 xf h16 y84 ff1 fs5 fc0 sc0 ls0 ws0">2.1.1.1. <span class="ff2 sc1">&#26102;&#38047;&#32593;&#32476;&#23618;&#27425;</span></div><div class="t m0 x29 h5 y85 ff3 fs2 fc1 sc0 ls0 ws0">Intel Agilex <span class="ff2">&#26102;&#38047;&#32593;&#32476;&#20197;&#19968;&#20010;<span class="_ _1"> </span></span>3<span class="_ _1"> </span><span class="ff2">&#32423;&#30340;&#23618;&#27425;&#32452;&#32455;&#32780;&#25104;&#12290;</span></div><div class="t m0 xf h5 y86 ff2 fs2 fc0 sc1 ls0 ws0">&#22270;<span class="ff1 sc0"> 2.</span></div><div class="t m0 x35 h5 y87 ff2 fs2 fc0 sc1 ls0 ws0">&#26102;&#38047;&#32593;&#32476;&#23618;&#27425;</div><div class="c x9 y88 w3 h17"><div class="t m0 x39 h18 y89 ff7 fsc fc2 sc0 ls0 ws0">Progr<span class="_ _7"></span>ammable</div><div class="t m0 x3a h18 y8a ff7 fsc fc2 sc0 ls0 ws0">Clock Routing</div><div class="t m0 x3b h18 y8b ff7 fsc fc2 sc0 ls0 ws0">SCLK</div><div class="t m0 x3c h14 y8c ff7 fs9 fc2 sc0 ls0 ws0">6<span class="_ _d"></span>32</div><div class="t m0 x25 h14 y8d ff7 fs9 fc2 sc0 ls0 ws0">32</div><div class="t m0 x3d h18 y8e ff7 fsc fc2 sc0 ls0 ws0">Row Clock</div><div class="t m0 x3e h18 y8f ff7 fsc fc2 sc0 ls0 ws0">First L<span class="_ _7"></span>evel<span class="_ _e"> </span>Second Lev<span class="_ _7"></span>el<span class="_ _f"> </span>Thir<span class="_ _7"></span>d Level</div><div class="t m0 x0 h18 y90 ff7 fsc fc2 sc0 ls0 ws0">Clock Source</div></div><div class="t m0 x1 hb y91 ff1 fs7 fc0 sc0 ls0 ws0">683761 | 2021.12.13</div><div class="t m0 xb hd y71 ff2 fs7 fc0 sc1 ls0 ws0">&#21457;&#36865;&#21453;&#39304;</div><div class="t m0 x33 hd y72 ff2 fs7 fc1 sc0 ls1 ws0">&#33521;&#29305;&#23572;&#20844;&#21496;&#12290;&#20445;&#30041;&#25152;&#26377;&#26435;&#21033;<span class="ls0">&#12290;&#33521;&#29305;&#23572;<span class="_ _4"></span>&#12289;</span>&#33521;&#29305;&#23572;&#24509;&#26631;&#21644;&#20854;&#20182;&#33521;&#29305;&#23572;&#26631;&#24535;&#26159;&#33521;&#29305;&#23572;&#20844;&#21496;&#25110;&#20854;&#23376;&#20844;&#21496;&#30340;&#21830;&#26631;&#12290;&#20381;&#29031;&#33521;&#29305;&#23572;&#30340;&#26631;&#20934;&#20445;&#35777;&#26465;</div><div class="t m0 x33 hd y73 ff2 fs7 fc1 sc0 ls0 ws0">&#20363;&#65292;<span class="ls2">&#33521;&#29305;&#23572;&#20445;&#35777;&#20854;<span class="_ _3"> </span></span><span class="ff3">FPGA<span class="_ _3"> </span></span><span class="ls2">&#21644;&#21322;&#23548;&#20307;&#20135;&#21697;&#30340;&#24615;&#33021;&#31526;&#21512;&#24403;&#21069;&#35268;&#26684;&#65292;&#20294;&#20445;&#30041;&#38543;&#26102;&#26356;&#25913;&#20219;&#20309;&#20135;&#21697;&#21644;&#26381;&#21153;&#30340;&#26435;&#21033;&#65292;&#24661;&#19981;&#21478;&#34892;&#36890;&#30693;</span>&#12290;&#33521;&#29305;&#23572;&#27010;</div><div class="t m0 x33 hd y74 ff2 fs7 fc1 sc0 ls1 ws0">&#19981;&#25215;&#25285;&#22240;&#24212;&#29992;&#25110;&#20351;&#29992;&#26412;&#25991;&#20013;&#25551;&#36848;&#30340;&#20219;&#20309;&#20449;&#24687;&#12289;&#20135;&#21697;&#25110;&#26381;&#21153;&#32780;&#20135;&#29983;&#30340;&#20219;&#20309;&#36131;&#20219;&#21644;&#20041;&#21153;&#65292;&#38500;&#38750;&#24471;&#21040;&#33521;&#29305;&#23572;&#20070;&#38754;&#19978;&#30340;&#26126;&#30830;&#21516;&#24847;<span class="ls0">&#12290;&#24314;&#35758;&#33521;</span></div><div class="t m0 x33 hd y75 ff2 fs7 fc1 sc0 ls0 ws0">&#29305;&#23572;&#23458;&#25143;&#22312;&#20449;&#36182;&#20219;&#20309;&#24050;&#21457;&#24067;&#30340;&#20449;&#24687;&#20043;&#21069;&#20197;&#21450;&#19979;&#21333;&#35746;&#36141;&#20135;&#21697;&#25110;&#26381;&#21153;&#20043;&#21069;&#65292;&#24212;&#20808;&#33719;&#21462;&#26368;&#26032;&#29256;&#26412;&#30340;&#22120;&#20214;&#35268;&#26684;&#12290;</div><div class="t m0 x33 hd y76 ff3 fs7 fc1 sc0 ls0 ws0">*<span class="ff2">&#20854;&#20182;&#30340;&#21517;&#31216;&#21644;&#21697;&#29260;&#21487;&#33021;&#26159;&#20854;&#20182;&#25152;&#26377;&#32773;&#30340;&#36164;&#20135;&#12290;</span></div><div class="t m0 x34 hb y77 ff1 fs7 fc0 sc0 ls0 ws0">ISO</div><div class="t m0 x34 hb y78 ff1 fs7 fc0 sc0 ls0 ws0">9001:2015</div><div class="t m0 x34 hb y79 ff1 fs7 fc0 sc0 ls0 ws0">Registered</div><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a><a class="l"><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>
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