01 STM32F103C8新建寄存器工程模板.zip
大小:415.02KB
价格:20积分
下载量:0
评分:
5.0
上传者:xiaolong1126626497
更新日期:2025-09-22

STM32F103C8新建寄存器工程模板.zip

资源文件列表(大概)

文件名
大小
01 STM32F103C8新建工程模块/
-
01 STM32F103C8新建工程模块/OBJECT/
-
01 STM32F103C8新建工程模块/OBJECT/STM32_MD.axf
233.02KB
01 STM32F103C8新建工程模块/OBJECT/STM32_MD.build_log.htm
1.3KB
01 STM32F103C8新建工程模块/OBJECT/STM32_MD.hex
4.4KB
01 STM32F103C8新建工程模块/OBJECT/STM32_MD.htm
26.63KB
01 STM32F103C8新建工程模块/OBJECT/STM32_MD.lnp
399B
01 STM32F103C8新建工程模块/OBJECT/STM32_MD.map
23.27KB
01 STM32F103C8新建工程模块/OBJECT/STM32_MD.sct
479B
01 STM32F103C8新建工程模块/OBJECT/STM32_MD_STM32F103.dep
1.96KB
01 STM32F103C8新建工程模块/OBJECT/core_cm3.crf
3.85KB
01 STM32F103C8新建工程模块/OBJECT/core_cm3.d
107B
01 STM32F103C8新建工程模块/OBJECT/core_cm3.o
10.79KB
01 STM32F103C8新建工程模块/OBJECT/main.crf
227.11KB
01 STM32F103C8新建工程模块/OBJECT/main.d
404B
01 STM32F103C8新建工程模块/OBJECT/main.o
235.63KB
01 STM32F103C8新建工程模块/OBJECT/startup_stm32f10x_md.d
64B
01 STM32F103C8新建工程模块/OBJECT/startup_stm32f10x_md.lst
39.59KB
01 STM32F103C8新建工程模块/OBJECT/startup_stm32f10x_md.o
5.74KB
01 STM32F103C8新建工程模块/OBJECT/system_stm32f10x.crf
217KB
01 STM32F103C8新建工程模块/OBJECT/system_stm32f10x.d
284B
01 STM32F103C8新建工程模块/OBJECT/system_stm32f10x.o
228KB
01 STM32F103C8新建工程模块/STM32_MD.build_log.htm
255B
01 STM32F103C8新建工程模块/STM32_MD.uvgui.11266
88.51KB
01 STM32F103C8新建工程模块/STM32_MD.uvgui.Administrator
70.74KB
01 STM32F103C8新建工程模块/STM32_MD.uvopt
7.08KB
01 STM32F103C8新建工程模块/STM32_MD.uvproj
16.07KB
01 STM32F103C8新建工程模块/STM32_MD_LED.dep
1.88KB
01 STM32F103C8新建工程模块/STM32_MD_uvproj.bak
-
01 STM32F103C8新建工程模块/SYSLIB/
-
01 STM32F103C8新建工程模块/SYSLIB/core_cm3.c
16.87KB
01 STM32F103C8新建工程模块/SYSLIB/core_cm3.h
83.71KB
01 STM32F103C8新建工程模块/SYSLIB/startup_stm32f10x_md.s
12.47KB
01 STM32F103C8新建工程模块/SYSLIB/stm32f10x.h
619.08KB
01 STM32F103C8新建工程模块/SYSLIB/system_stm32f10x.c
35.7KB
01 STM32F103C8新建工程模块/SYSLIB/system_stm32f10x.h
2.04KB
01 STM32F103C8新建工程模块/SYSTEM/
-
01 STM32F103C8新建工程模块/USER/
-
01 STM32F103C8新建工程模块/USER/main.c
4.79KB

资源内容介绍

这是采用寄存器方式新建的一个keil工程模版。用于学习接下来的寄存器编程。芯片采用的 STM32F103C8。
/** ****************************************************************************** * @file system_stm32f10x.c * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. * * 1. This file provides two functions and one global variable to be called from * user application: * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier * factors, AHB/APBx prescalers and Flash settings). * This function is called at startup just after reset and * before branch to main program. This call is made inside * the "startup_stm32f10x_xx.s" file. * * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used * by the user application to setup the SysTick * timer or configure other parameters. * * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must * be called whenever the core clock is changed * during program execution. * * 2. After each device reset the HSI (8 MHz) is used as system clock source. * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to * configure the system clock before to branch to main program. * * 3. If the system clock source selected by user fails to startup, the SystemInit() * function will do nothing and HSI still used as system clock source. User can * add some code to deal with this issue inside the SetSysClock() function. * * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. * When HSE is used as system clock source, directly or through PLL, and you * are using different crystal you have to adapt the HSE value to your own * configuration. * ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** *//** @addtogroup CMSIS * @{ *//** @addtogroup stm32f10x_system * @{ */ /** @addtogroup STM32F10x_System_Private_Includes * @{ */#include "stm32f10x.h"/** * @} *//** @addtogroup STM32F10x_System_Private_TypesDefinitions * @{ *//** * @} *//** @addtogroup STM32F10x_System_Private_Defines * @{ */ #if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) #define SYSCLK_FREQ_24MHz 24000000#else #define SYSCLK_FREQ_72MHz 72000000#endif #if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)#endif #define VECT_TAB_OFFSET 0x0 /** * @} *//** @addtogroup STM32F10x_System_Private_Macros * @{ *//** * @} *//** @addtogroup STM32F10x_System_Private_Variables * @{ *//******************************************************************************** Clock Definitions*******************************************************************************/#ifdef SYSCLK_FREQ_HSE uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; #elif defined SYSCLK_FREQ_24MHz uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; #elif defined SYSCLK_FREQ_36MHz uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; #elif defined SYSCLK_FREQ_48MHz uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; #elif defined SYSCLK_FREQ_56MHz uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; #elif defined SYSCLK_FREQ_72MHz uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; #else uint32_t SystemCoreClock = HSI_VALUE; #endif__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};/** * @} *//** @addtogroup STM32F10x_System_Private_FunctionPrototypes * @{ */static void SetSysClock(void);#ifdef SYSCLK_FREQ_HSE static void SetSysClockToHSE(void);#elif defined SYSCLK_FREQ_24MHz static void SetSysClockTo24(void);#elif defined SYSCLK_FREQ_36MHz static void SetSysClockTo36(void);#elif defined SYSCLK_FREQ_48MHz static void SetSysClockTo48(void);#elif defined SYSCLK_FREQ_56MHz static void SetSysClockTo56(void); #elif defined SYSCLK_FREQ_72MHz static void SetSysClockTo72(void);#endif#ifdef DATA_IN_ExtSRAM static void SystemInit_ExtMemCtl(void); #endif /** * @} *//** @addtogroup STM32F10x_System_Private_Functions * @{ *//** * @brief Setup the microcontroller system * Initialize the Embedded Flash Interface, the PLL and update the * SystemCoreClock variable. * @note This function should be used only after reset. * @param None * @retval None */void SystemInit (void){ /* Set HSION bit *

用户评论 (0)

发表评论

captcha

相关资源

崖山YashanDB数据库系统YCA认证教材全套

第1课时:YashanDB基础介绍.pdf第2课时:YashanDB安装部署.pdf第3课时:YashanDBSQL语言(基础篇).pdf第4课时:YashanDB体系结构.pdf第5课时:YashanDB实例管理.pdf第6课时:YashanDB存储管理.pdf第7课时:YashanDB文件管理.pdf第8课时:YashanDB对象管理(基础篇).pdf第9课时:YashanDB数据字典和动态性能视图.pdf第10课时:YashanDB应用开发.pdf

11.58MB46积分

ISO 15118最新的全集

原文版本,支持复制,不是图片扫描版全文可复制可以转为word,是纯官方源文档,可以自己进行参考和查看

53.7MB39积分

基于Java Web的传智书城项目-完整项目包

系统实现4.1系统实现过程4.1.1项目环境搭建在开发功能模块之前,先进行项目环境及项目框架的搭建。(1)确定项目开发环境 操作系统:Windows XP、Windows7或更高的Windows版本。Web 服务器:Tomcat 8.0。Java开发包:JDK1.8。数据库:MySQL8.0.33。开发工具:Eclipse Java EE IDE for Web Developers。浏览器:1E8.0或更高版本。(2)创建数据库表在MySQL数据库中创建一个名称为itcaststore的数据库,并根据表结构在itcaststore数据库中创建相应的表。(3)创建项目,引入JAR包在Eclipse 中创建一个名称为itcaststore的Dynamic WebProject,将项目所需JAR包导入到项目的WEB-INF/lib文件夹下。 本项目使用C3p0 数据源连接数据库,需要C3pO数据源的JAR包。项目的JSP页面使用了JSTL标签库,需要jstl.jar和standard.jar 两个包。项目中使用DBUtils工具处理数据的持久化操作。

2.53MB20积分

前端开发过程中的代码规范

通过几年的工作经验,和参考一些大厂规范以及一些开源的优秀源码,整理了一些前端代码规范,帮助我们后续可以写出更好维护的代码。

52.65KB17积分